Challenges for Performance Analysis in High-Performance Reconfigurable Computing

Reconfigurable computing (RC) applications em- ploying both microprocessors and reconfigurable hard- ware (e.g., FPGAs) have the potential for large speedup when compared with traditional parallel applications. However, this potential is marred by the additional com- plexity of these dual-paradigm systems, making it diffi- cult to achieve the desired performance. For parallel software applications (e.g., in MPI), performance anal- ysis tools are well researched and widely available, aid- ing designers in understanding the dynamic behavior of their applications. Unfortunately, for RC applica- tions, such concepts and tools are lacking, despite be- ing of great importance due to the increased complexity of these applications. In this paper, we explore chal- lenges faced in attaining automated techniques for in- strumentation and low-overhead runtime measurement of diverse resources in RC systems. We present ideas for the integration of these techniques into existing perfor- mance analysis tools for conventional parallel systems with the goal of creating a unified analysis tool for RC applications. Results from a case study are provided us- ing a prototype of this new tool.