Circuit Implementation Of Spike Time Dependent Plasticity (Stdp) For Artificial Synapse

Synapses are crucial elements for computation and information storage in both human brain and artificial neural systems. This paper presents a compact implementation of synaptic strength modification circuit based on a resistive switching device. The circuit works according to a Spike Time Dependent Plasticity (STDP) rule, ensuring that the timing between pre and post synaptic spikes lead to the Long Term Potentiation (LTP) and the Long Term Depression (LTD), and the modification of resistance in resistive switching device, finally the strength of synaptic connections is modified. This circuit is designed under a 0.13um CMOS technology. The proposed circuit is suitable for CMOS implementation of neuromorphic architectures.