Interfacial structure and electrical properties of LaAlO 3 gate dielectric films on Si by metalorganic chemical vapor deposition

LaAlO 3 (LAO) gate dielectric films were deposited on Si substrates by low-pressure metalorganic chemical vapor deposition. The interfacial structure and composition distribution were investigated by high-resolution transmission electron microscopy (HRTEM), X-ray photoelectron spectroscopy (XPS), secondary-ion mass spectroscopy (SIMS), and Auger-electron spectroscopy (AES). HRTEM confirms that there exists an interfacial layer between LAO and Si in most samples. AES, SIMS, and XPS analyses indicate that the interfacial layer is compositionally graded La–Al silicate and the Al element is severely deficient close to the Si surface. Electrical properties of LAO films were evaluated. No evident difference in electrical properties between samples with and without native SiO 2 layers was observed. The electrical properties are discussed in terms of LAO growth mechanisms, in relation to the interfacial structure.