System on Programmable Chip Development System

ETCS), 2010 Second International Workshop(2010)

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摘要
The embedded systems have received increasing research interest in recent years due to its wide usage. This paper presents system on programmable chip (SOPC), a new technology in the embedded systems, to support the development of design projects for undergraduate students in their electrical and computer engineering curriculum. FPGA-based SOPC development board with reduced instruction set computer (RISC) processor cores, a top-down design approach with FPGA computer-aided design tools, a C compiler for the RISC soft-processor core and a large FPGA with on-chip memory are used for a wide variety of student design projects. The course, which includes both software and hardware, can meet the different needs of students from different professional backgrounds and contribute to a better understanding between electrical engineering and computer science and therefore can increase the competitiveness of students.
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关键词
embedded systems,field programmable gate arrays,reduced instruction set computing,system-on-chip,C compiler,FPGA-based SOPC,RISC soft-processor core,computer-aided design,embedded systems,reduced instruction set computer,system on programmable chip,system-on-chip,Altera,Nios-II,field-programmable gate array (FPGA),system-on-a-programmable-chip (SOPC)
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