A Low Power Cryogenic Cmos Roic For 512x512 Infrared Focal Plane Array

A low power cryogenic readout integrated circuit (ROIC) for mid- and far-wave infrared focal plane array (FPA) is presented as a prototype for 512x512 image system. By applying capacitive trans-impedance amplifier (CTIA) with inherent correlated double sampling (CSD) structure, a high performance readout interface circuit for the infrared FPA is realized with a pixel size of 30x30 mu m2. Optimized column readout timing and two operating modes in column amplifiers are used to reduce the power consumption. The readout chip designed by Chartered 0.35 mu m 2P4M process shows more than 10 MHz readout rate and less than 70 mW power consumption under 3.3 V supply voltage at 77 K to 150 K operating temperature. And it occupies an area of 18.4x17.5 mm2.