A folded current-reused CMOS power amplifier for low-voltage 3.0–5.0 GHz UWB applications

Proceedings of International Conference on ASIC(2013)

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摘要
This paper proposes a low-voltage power amplifier for the 3.0-5.0 GHz ultra-wideband applications. Based on the classical current-reused technique, it adopts a folded topology to achieve the low-voltage working with acceptable output linearity. Its two-stage amplifying configuration consists of only one NMOS and one PMOS transistors. Implemented in the 0.18 μm CMOS technology, it obtains a gain as high as 16 dB with only ±0.5 dB flatness over the full working band, and consumes only 23.2 mW with 0.75mm2 size under 1.2 V. © 2013 IEEE.
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