A 25-Gb/S 32.1-Db Cmos Limiting Amplifier For Integrated Optical Receivers

Zhengxiong Hou,Yipeng Wang,Quan Pan,C. Patrick Yue

2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)（2013）

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摘要

A 65-nm CMOS limiting amplifier based on three stages of a modified Cherry-Hooper amplifier with offset cancellation is presented. The trade-off between the offset cancellation range and input-referred noise is discussed. The variations on gain and bandwidth due to PVT corners are presented. The limiting amplifier achieves 32.1 dB gain and 21.6 GHz bandwidth, with a 1-V supply and a power dissipation of 33.3 mW.

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关键词

CMOS analogue integrated circuits,integrated optoelectronics,operational amplifiers,optical fibre amplifiers,optical limiters,optical receivers,CMOS limiting amplifier,PVT corners,bandwidth 21.6 GHz,bit rate 25 Gbit/s,gain 32.1 dB,input-referred noise,integrated optical receivers,modified Cherry-Hooper amplifier,offset cancellation range,power 33.3 mW,size 65 nm,transimpedance amplifier,voltage 1 V,

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