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High-performance CMOS-compatible self-aligned In0.53Ga0.47As MOSFETs with GMSAT over 2200 µS/µm at VDD = 0.5 V

Electron Devices Meeting(2014)

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摘要
We demonstrate high-performance self-aligned In0.53Ga0.47As-channel MOSFETs with effective channel length LEFF down to 20 nm, peak transconductance GMSAT over 2200 μS/μm at LEFF = 30 nm and supply voltage VDD = 0.5 V, thin inversion oxide thickness TINV = 1.8 nm, and low series resistance REXT = 270 Ω.μm. These MOSFETs operate within 20% of the ballistic limit for LEFF ≤ 30 nm and are among the best In0.53Ga0.47As FETs in literature. We investigate the effects of channel/barrier doping on FET performance and show that increase in mobility beyond ~ 500 cm2/Vs has progressively smaller impact as LEFF is scaled down. Our self-aligned MOSFETs were fabricated using a CMOS-compatible process flow that includes gate and spacer formation using RIE, source/drain extension (SDE) implantation, and in-situ-doped raised source/drain (RSD) epitaxy. This process flow is manufacturable and easily extendable to non-planar architectures.
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关键词
CMOS integrated circuits,MOSFET,arsenic alloys,gallium alloys,indium alloys,semiconductor doping,CMOS-compatible process flow,In0.53Ga0.47As,RIE,RSD epitaxy,SDE implantation,ballistic limit,barrier doping,channel doping,channel length,complementary metal oxide semiconductor,high-performance self-aligned MOSFET,in-situ-doped raised source/drain epitaxy,inversion oxide thickness,metal oxide semiconductor field effect transistor,series resistance,source/drain extension implantation,transconductance,voltage 0.5 V
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