A 32-channel 12-bits 65nm Wilkinson ADC for CMS central tracker

The ADC proposed in this paper is part of a larger VLSI (Very Large Scale Integration) circuit, called Detector Control Unit (DCU), whose aim is to monitor some critical quantities in the High-Energy Physical experiments inside the Large Hadron Collider (LHC). In particular it has been developed for the CMS (Compact Muon Solenoid) central tracker. The damage caused by radiation in such an environment requires that some key-parameters like leakage currents, local temperatures and supply voltages are carefully monitored in order to reduce failure events and improve overall performance. Indeed, CMOS integrated circuits, if exposed to very high radiation levels can experience large leakage currents and significant voltage/temperature variations. For this reason this monitoring system has been realized to provide real time information about the electrical/physical scenario of detectors. The ADC here shown, based on a Wilkinson single-slope architecture, has a resolution of 12 bits and is able to manage 32 input analog channels. Simulation results have shown a definitive 11 bit accuracy and a power consumption of about 500 μW. The ADC has been designed in CMOS 65 nm technology. It operates with a 40 MHz clock frequency. The final signal sample rate is about 5.5 kHz.