Exploiting the inherent parallelisms of back-propagation neural networks to design a systolic array
international symposium on neural networks（1991）
摘要
A two-dimensional systolic array for a backpropagation neural network is presented. The design is based on the classical systolic algorithm of matrix-by-vector multiplication and exploits the inherent parallelisms of backpropagation neural networks. This design executes the forward and backward passes in parallel, and exploits the pipelined parallelism of multiple patterns in each pass. The estimated performance of this design shows that the pipelining of multiple patterns is an important factor in VLSI neural network implementations
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关键词
vlsi,neural nets,parallel architectures,systolic arrays,backpropagation neural network,backward passes,design,forward passes,matrix-by-vector multiplication,parallel processing,pipelining,systolic array,computational modeling,computer science,algorithm design and analysis,neural networks,artificial neural networks,neural network
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