Handling special constructs in symbolic simulation

DAC(2002)

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摘要
Symbolic simulation is a formal verification technique which combines the flexibility of conventional simulation with powerful symbolic methods. Some constructs, however, which are easy to handle in conventional simulation need special consideration in symbolic simulation. This paper discusses some special constructs that require unique treatment in symbolic simulation such as the symbolic representation of arrays, an efficient This paper discusses some special constructs that are unique to symbolic simulation such as the symbolic representation of arrays, an efficient symbolic method for storing arrayed instances and the handling of symbolic data-dependent delays. We present results which demonstrate the effectiveness of our symbolic array model in the simulation of highly regular structures like FPGAs, memories or cellular automata.
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关键词
cellular automata,field programmable gate arrays,formal verification,integrated memory circuits,logic design,logic simulation,symbol manipulation,FPGA,cellular automata,digital circuit design,formal verification,memory circuit,symbolic array model,symbolic delay,symbolic instance array,symbolic simulation
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