Error analysis and complexity optimization for the multiplier-less FFT-like transformation (ML-FFT)

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium(2004)

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摘要
This paper studies the effect of the signal round-off errors on the accuracies of the multiplier-less Fast Fourier Transform- like transformation (ML-FFT). The idea of the ML-FFT is to parameterize the twiddle factors in the conventional FFT algorithm as certain rotation-like matrices and approximate the associated parameters inside these matrices by the sum-of- power-of-two (SOPOT) or canonical signed digits (CSD) representations. The error due to the SOPOT approximation is called the coefficient round-off error. Apart from this error, signal round-off error also occurs because of insufficient wordlengths. Using a recursive noise model of these errors, the minimum hardware to realize the ML-FFT subject to the prescribed output bit accuracy can be obtained using a random search algorithm. A design example is given to demonstrate the effectiveness of the proposed approach.
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关键词
computational complexity,error analysis,fast Fourier transforms,optimisation,randomised algorithms,roundoff errors,CSD representation,FFT algorithm,SOPOT approximation,canonical signed digits,coefficient round-off error,complexity optimization,error analysis,fast Fourier transform,hardware realization,insufficient wordlength,multiplier-less FFT-like transformation,output bit accuracy,parameter approximation,random search algorithm,recursive noise model,rotation-like matrix,signal round-off error,sum-of-power-of-two,transformation accuracy,twiddle factor parameterization
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