A 1.1 GHz first 64 b generation 2900 microprocessor

Curran, B., Camporese, P.,Carey, S.,Yuen Chan

San Francisco, CA, USA（2001）

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摘要

The first 64 b S/390 microprocessor implemented in a 0.18 /spl mu/m, 7-level copper interconnect bulk CMOS process, runs operating system and applications at 1.1 GHz. The frequency is achieved with interconnect width and repeater optimization, selective use of low-Vt devices, tapered library gates, and improved synthesis and circuit tuning algorithms.

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关键词

CMOS digital integrated circuits,high-speed integrated circuits,microprocessor chips,0.18 micron,1.1 GHz,2900 microprocessor,35 W,64 bit,7-level Cu interconnect,CMOS process,Cu,S/390 microprocessor architecture,circuit tuning algorithms,interconnect width optimization,low-Vt devices,repeater optimization,tapered library gates,

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