Low-power 4-bit flash ADC for digitally controlled DC-DC converter
Integrated Circuits（2011）
摘要
A low-power flash analog-to-digital converter (ADC) using logic gates as comparators is presented. The circuit is designed by using 0.35μm CMOS technology. A conversion delay of 12.55ns has been achieved at 200 Mega sample per second (MSPS). The static current consumptions at zero error bit from the power supply and sampled input are 63μA and 93μA respectively. The high speed and low power characteristic make the ADC structure ideal for the high frequency digitally controlled DC-DC converter applications.
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关键词
CMOS integrated circuits,DC-DC power convertors,analogue-digital conversion,comparators (circuits),digital control,logic gates,low-power electronics,CMOS technology,comparators,current 63 muA,current 93 muA,high frequency digitally controlled DC-DC converter,logic gates,low power characteristic,low-power flash ADC structure,low-power flash analog-to-digital converter,size 0.35 mum,static current consumptions,time 12.55 ns,word length 4 bit,zero bit error,DC-DC converter,digital control,flash ADC,
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