A 17pJ/bit broadband mixed-signal demodulator in 90nm CMOS

Kevin Chuang,David Yeh,Francesco Barale,Bevin George Perumana,Saikat Sarkar,Padmanava Sen,Stephane Pinel,Joy Laskar

Microwave Symposium Digest（2010）

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摘要

This paper presents the first fully integrated mixed-signal demodulator incorporating ultra low-power 3mW 3Gsps 3-bit ADCs and a 2mW high-speed real-time digital signal processing in 90nm CMOS that requires neither external synchronization controls nor processing to demodulate up to 3.5Gbps binary phase-shift keying (BPSK) modulated signal. The demodulator is integrated with IQ mixers, 13GHz QVCO, frequency synthesizers and baseband AGC, for an overall power consumption of 60mW from a 1V supply. The entire demodulator chip occupies 1.275×1.19mm2 and enables error free demodulation up to 2.5Gbps and BER of 1E-09 up to 3Gbps. To the best of authors' knowledge, this demonstrates the maximum throughput at minimum power budget among all types of CMOS multi-gigabit demodulators.

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关键词

cmos integrated circuits,mmic,automatic gain control,demodulators,frequency synthesizers,mixed analogue-digital integrated circuits,phase shift keying,voltage-controlled oscillators,adc,cmos multigigabit demodulator,iq mixers,qvco,baseband agc,binary phase shift keying modulated signal,broadband mixed signal demodulator,frequency 13 ghz,frequency synthesizer,fully integrated mixed signal demodulator,high speed real-time digital signal processing,power 2 mw,power 3 mw,power 60 mw,size 90 nm,voltage 1 v,90nm,bpsk,cmos,dsp,low-power,mixed-signal,multi-gigabit,process control,signal processing,wireless communication,chip,digital signal processing,phase modulation,mixed signal,binary phase shift keying,demodulation

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