Defect avoidance in programmable devices
IET Computers & Digital Techniques（2015）
摘要
Programmable logic devices permit a new way to practice yield improvement: redundancy at configuration time. By doing so, the authors avoid the overheads of traditional redundancy: explicit spares, replacement logic and on-chip non-volatile memory. This presentation describes a method for avoiding defects that also does not require a unique place-and-route for each fielded chip. Formal analysis and experimental results show the feasibility of the method for standard, unmodified field-programmable gate arrays.
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关键词
field programmable gate arrays,microprocessor chips,random-access storage,configuration time,defect avoidance,explicit spares,on-chip nonvolatile memory,programmable logic devices,redundancy overhead avoidance,replacement logic,unmodified field-programmable gate arrays
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