A WLAN RF CMOS PA With Large-Signal MGTR Method
Microwave Theory and Techniques, IEEE Transactions（2013）
摘要
A CMOS linear power amplifier for wireless local area network IEEE 802.11b/g application is presented. To achieve high linear output power and high efficiency, a large-signal multigated transistor linearization method is proposed with an envelope injection gate bias circuit. A novel inter-stage matching transformer, which functions as a power splitter, is designed to implement this method. It is fabricated with a TSMC 0.13-μm standard RF CMOS process. Measurement shows 19.5-dBm Pout with 24.8% power-added efficiency (PAE) at - 25-dB error vector magnitude with an orthogonal frequency-division multiplexing 64-QAM 54-Mb/s 802.11g signal source and 23.15-dBm Pout with 31.73% PAE with DSSS, CCK, and 11-Mb/s 802.11b signal source without digital pre-distortion.
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关键词
cmos integrated circuits,ofdm modulation,uhf power amplifiers,field effect mmic,linearisation techniques,microwave power amplifiers,wireless lan,64-qam,cmos linear power amplifier,ieee 802.11b,ieee 802.11g,rf cmos pa,wlan,bit rate 54 mbit/s,envelope injection gate bias circuit,interstage matching transformer,large-signal mgtr method,multigated transistor linearization method,orthogonal frequency division multiplexing,power splitter,size 0.13 mum,standard rf cmos process,wireless local area network,802.11b/g,${ g}_{{ m}3}$,am-to-am,am-to-pm,cmos,error vector magnitude (evm),fully on-chip,large-signal (ls) multigated transistor (mgtr),linearity,linearization,power amplifier (pa),third-order intermodulation distortion (imd3),transmission-line transformer (tlt),wireless local area network (wlan),capacitance,power transistors,logic gates,transistors,64 qam,power generation
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