A 50-MHz continuous-time switched-current /spl Sigma//spl Delta/ modulator

A new architecture of second-order continuous-time switched-current /spl Sigma//spl Delta/ modulator is presented. A reference current generator is used in the second stage to solve the scaling problem. A novel current switch is designed to minimize the clock feedthrough problem and increase the operating speed. With a 50 MHz sampling rate, it has achieved 50 dB dynamic range (8-bit) at 1 MHz. This modulator has been fabricated in a 2 /spl mu/m CMOS process with an active area of 0.37 mm/sup 2/. The power dissipation is 15 mW.