Subnano Time To Digital Converter Implemented In Parisroc For Pmm(2) R&D Program

PARISROC is a complete read out chip, in a BiCMOS SiGe 0.35 mu m technology from AustriaMicroSystems, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and is part of a R&D program called PMm(2). The ASIC integrates 16 independent and auto triggered channels with variable gain and provides charge and time measurement by a 10-bit Wilkinson ADC and a 24-bit counter. The time measurement is made of 2 complementary systems: a 24-bit gray counter (coarse time) with a step of 100 ns, and a double ramp TDC (fine time) with a 10-bit resolution and a measured precision of 425 ps RMS. Only the analog TDC will be explained in this paper by detailing the double ramp TDC architecture, the special cares and the first fine time measurements. One of the fine time TDC characteristics is the fact that the double ramp generator is common to all channels.