Compact Design of Low Power Standard Ternary Inverter Based on OFF-State Current Mechanism Using Nano-CMOS Technology

We propose a novel standard ternary inverter (STI) based on nanoscale CMOS technology for a compact design of multivalued logic. Using the gate bias independent OFF-state mechanisms of junction band-to-band tunneling (BTBT), tristate STI operation has been demonstrated in the conventional binary CMOS inverter by TCAD device and mixed-mode circuit simulation with 32-nm high-κ/metal-gate technology....