Germanium p-Channel FinFET Fabricated by Aspect Ratio Trapping

IEEE Transactions on Electron Devices(2014)

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摘要
We report scaled Ge p-channel FinFETs fabricated on a 300-mm Si wafer using the aspect-ratio-trapping technique. For long-channel devices, a combination of a trap-assisted tunneling and a band-to-band tunneling leakage mechanism is responsible for an elevated bulk current limiting the OFF-state drain current. However, the latter can be mitigated by device design. We report low long-channel subthre...
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关键词
FinFETs,Silicon,Logic gates,Epitaxial growth,Temperature measurement,Subspace constraints,Current measurement
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