A 45nm Low-Cost Lstp Cmos Technology With Full Ncs/Dual-Damascene Cu Interconnects

2007 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PAPERS（2007）

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摘要

A 45nm low-cost LSTP CMOS technology is presented. This technology features advanced ArF lithography using SRAF, low-leak transistors fabricated by optimized SiON and S/D junction design, CoSi2, SRAM cell with acceptable operational margin, and full- NC S/dual- damascene Cu interconnects. It is emphasized that this technology is cost-effective.

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关键词

lithography,leakage current,transistors,dielectrics,cmos technology,cmos integrated circuits,copper,cost effectiveness,design optimization

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