Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask

The Cost of Ownership (CoO) for semiconductor processing has been primarily dominated by lithography. In multiple patterning processes, additional materials and the impact to throughput of multiple patterning passes appear to become additional major contributors to manufacturing cost as well. We introduce SiOxNy hardmask as a new memorization layer for multiple patterning that addresses the non-lithographic cost contributor to manufacturing. The optical constants of the SiOxNy hardmask are matched to those of the photoresist at the imaging wavelength, and that makes it invisible at the exposure wavelength, enabling lithography directly over the hardmask topography, while at the same time it will be visible to those wavelengths that are used for alignment and overlay. The SiOxNy hardmask is inserted below the photoresist which will make the rework and integration schemes much simpler and result in cost savings by replacing only photoresist layers during multiple patterning processes. Additionally, by eliminating the need for traditional spincast planarization and the associated tri-layer etch we can improve the critical dimension uniformity (CDU) and reduce proximity contributions from etch, and their respective etch proximity corrections. In this work, we engineered the lithographic stack to be compatible with the invisible SiOxNy hardmask. Lithographic process windows, CDU, and LER/LWR are compared with conventional tri-layer stack and we demonstrate triple patterning memorized into the SiOxNy hardmask after which patterns are then transferred, at once, into the bottom integrated stack. Finally, major benefits of using the invisible hardmask on device scaling and patterning challenges are discussed, such as for LE2, LE3, and trench and cut patterning.