Compliant Bump Technology For Back-Side Illuminated Cmos Image Sensor

Tanemasa Asano,Naoya Watanabe,Isao Tsunoda,Yasuhiro Kimiya,Katsuaki Fukunaga, M Handa,Hiroki Arao,Yasuhiro Yamaji,Masahiro Aoyagi,Takao Higashimachi,Koichiro Tanaka,Takayuki Takao,Kohei Matsumura,Akihiro Ikeda,Yukinori Kuroki,Toshio Tsurushima

2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4（2009）

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摘要

We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.

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关键词

photodetectors,silicon,vga,photodiodes,cmos image sensor,stacking,copper,prototypes,circuits,cmos technology,chip,gold,graphics,resists,pixel,cmos integrated circuits

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