Study on practical application to pattern top resist loss measurement by CD-SEM for high NA immersion lithography

With semiconductor technology moving to smaller patterns after the 45nm hp node, introduction of high-NA immersion lithography progresses, and with it, the challenge of decreasing process latitude. The decreasing lithography tool focus margin is mentioned as one of the key problems of a high-NA immersion lithography process. Tool focus fluctuation has an impact on resist pattern shape and not only does CD change, pattern height also decreases. As a result of previous studies [1][2], it is understood that the resist loss influences pattern formation after etch, and it was confirmed that resist loss is important for CD control. We observe correlation between the resist top roughness and the resist loss, and evaluate the resist loss measurement function by quantifying the resist top roughness. This principle of resist loss detection by measuring roughness is that a changing roughness of resist pattern top is detected as a fluctuation in image brightness on the CD-SEM. A measurement idea was proposed and performance evaluation has already been performed by using one kind of sample. In this study, we demonstrate the validity of resist loss detection by investigating various wafer conditions which contain the dependency by looking at two types of resist and different exposure tool illumination settings. Furthermore, we have confirmed the sensitivity limit of resist loss detection which is approximately above 10nm. Finally, we have discussed improving the resist loss detection sensitivity and considered the applicability of resist loss detection for the litho process monitor.