TCAD Modeling and Simulation of Sub-100nm Gate Length Silicon and GaN Based SOI MOSFETs

Sub-100nm gate length silicon and GaN based SOI n-type MOSFET are modeled and simulated using ISE-TCAD (now synopsys_sentaurus). Several silicon SOI structures such as planar fully depleted SOI, FinFET, Tri-Gate MOSFET, cylindrical channel (OMFET) and triangular channel MOSFETs have been studied to compare the structure dependence of the device performance. Silicon and GaN as channel materials are also compared for these different SOI structures for projecting the device performance for very short channel SOI MOSFETs. Our study shows that for sub-100nm gate length, GaN based transistors have better Ion/Ioff ratio and higher small signal transconductance than silicon based transistors. And GaN and Si based devices have comparable performance such as sub-threshold slope and threshold roll off, etc. However for sub 20nm gate length, simulation shows that while it is not satisfying for silicon based device for digital applications, GaN based transistors with lower off state leakage current, less short channel effect than Silicon based transistors are still good candidates for digital applications . The TCAD study shows that GaN could be a promising candidate for making very short channel device as the GaN processing technology is advancing.