Critical analysis of 14nm device options

P Oldiges,Ramachandran Muralidhar, P K Kulkarni,Ch Lin,Kai Xiu, Dalei Guo,Mandeep S Bajaj,Ninad D Sathaye

international conference on simulation of semiconductor processes and devices（2011）

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摘要

Modeling challenges and solutions for silicon based high performance device options at the 14nm node are presented. A variety of devices are being considered, using a variety of methods to analyze the devices objectively. Partially depleted silicon on insulator (PDSOI) devices are compared against extremely thin (ETSOI) and FinFET devices.

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关键词

process model,silicon,logic gates,semiconductor device modeling,logic gate,tcad,mathematical model,silicon on insulator

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