Increasing Vg-Type 3d Nand Flash Cell Density By Using Ultra-Thin Poly-Silicon Channels

Z-direction pitch (stacking period) scaling is critical to the ultimate number of stacking of 3D NAND Flash. In this work, we study the ultra-thin (<10nm) poly-Si channel together with a thinner inter-poly oxide for Vertical Gate (VG)-type 3D NAND Flash. For the first time, the Z pitch is successfully scaled to 18nm and the memory cell still provides adequate performance. The impact of the Z pitch on the P/E memory window, Z disturb, and read current are studied extensively.