Integrated modeling platform for High-k/alternate channel material heterostructure stacks

2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)(2015)

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摘要
To study the High-k dielectrics on alternate semiconductor materials for transistors a modeling platform has been developed which implements a faster 1D Schrodinger-Poisson along with trap models. A fitting algorithm is used for the extraction of trap profiles which fits the model capacitance/admittance to the measurements in the least square sense. The extraction is illustrated on a subnanometer EOT HfO 2 /SiGe/Si heterostructure stack.
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关键词
heterostructures,gate stacks,interface traps
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