Fin Width Scaling For Improved Short Channel Control And Performance In Aggressively Scaled Channel Length Soi Finfets

2013 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S)(2013)

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摘要
This work presents SOI finFETs with fin width (Dfin) scaled to sub 15nm. The process flow provides robust Dfin scaling as depicted by the universal electrostatic scaling of the DIBL and sub-threshold swing (SS). The high field long channel mobility drops by similar to 6% with Dfin scaling, however, DIBL and SS improves by similar to 1.5X and similar to 2X, respectively, for 20nm channel length n/pfinFETs. The effective current (Ieff) at fixed Ioff improves by similar to 20% and similar to 30% for p and n finFETs, respectively, with Dfin scaling.
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关键词
silicon on insulator
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