VLSI Design and Optimized Implementation of a MIPS RISC Processor using XILINX Tool

International Journal of Advanced Research in Computer Science and Electronics Engineering(2012)

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摘要
In this paper I have described the design of a 16-bit Optimized MIPS RISC processor for applications in real-time embedded systems and also I tried to compare that with the RISC processor having an ease of pipelining. RISC is a design philosophy that has become a mainstream in scientific and engineering applications [7] . The processor executes most of the instructions in single machine cycle making it ideal for use in high speed systems. The processor is designed and implemented on an FPGAboard Spartan XC2S20C (Spartan 2E) using VHDL and VERILOG [5] such that one can reconfigure it according to specific requirements of the target applications. The processor is powerful enough to be used as a stand-alone processing element and is generic enough to be used in multi-processor System on Chip.
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关键词
pipelining,fpga,vlsi,risc processor
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