45nm-Node Beol Integration Featuring Porous-Ultra-Low-K/Cu Multilevel Interconnects

I Sugiura,Y Nakata, N Misawa, S Otsuka, N Nishikawa, Y Iba, F Sugimoto, Y Setta,H Sakai, Y Mizushima,Y Kotaka,C Uchibori,T Suzuki, H Kitada,Y Koura, K Nakano, T Karasawa,Y Ohkura, H Watatani, M Sato, S Nakai, M Nakaishi, N Shimizu, S Fukuyama,M Miyajima, T Nakamura, E Yano,K Watanabe

PROCEEDINGS OF THE IEEE 2005 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE(2005)

引用 16|浏览9
暂无评分
摘要
45nm-node multilevel Cu interconnects with porous-ultra-low-k have successfully been integrated. Key features to realize 45nm-node interconnects are as follows: 1) porous ultra-low-k material NCS (Nano-Clustering Silica [1]) has been applied to both wire-level and via-level dielectrics (what we call full-NCS structure), and its sufficient robustness has been demonstrated. 2) 70-nm vias have been formed by high-NA 193nm lithography with fine-tuned model-based OPC and multi-hard-mask dual-damascene process. More than 90% yields of 1M via chains have been obtained. 3) Good TDDB (Time-Dependent Dielectric Breakdown) characteristics of 70nm wire spacing filled with NCS has been achieved. Because it is considered that applied-voltage (Vdd) of a 45nm-node technology will be almost the same as that of the previous technology, the dielectrics have to endure the high electrical field. NCS in Cu wiring has excellent insulating property without any pore sealing materials which cause either keff value or actual wire width to be worse.
更多
查看译文
关键词
robustness,dielectric materials,electric field,dielectric breakdown,lithography,copper,tddb,opc
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要