Contact-hole patterning for random logic circuits using block copolymer directed self-assembly

Block copolymer directed self-assembly (DSA) is a promising extension of optical lithography for device fabrication akin to double-patterning. The irregular distribution of contact holes in circuit layouts is one of the biggest challenges for DSA patterning because the self-assembly tends to form regular patterns naturally. Although the small guiding templates are shown to guide the self-assembly off the natural geometry by strong boundary confinement [1, 2] (Fig. 1), it is insufficient to simply surround contact holes with guiding templates without optimizing the placement and geometry of the guiding templates. In this paper, we show the use of gridded design rules (GDR) [3], while it is not essential for the DSA process, does provide an excellent starting point for DSA patterning optimization by minimizing layout modification, simplifying guiding template design and improving DSA yield. The benefits are maximized when the contact pitch/size matches the geometries of the naturally self-assembled block copolymers. We designed GDR-compatible standard logic cells based on the layouts from an open cell library [4] (Fig. 2), shrinking the cell layouts down to 22 nm node with poly gate pitch of 82 nm and Metal-1 pitch of 64 nm [5]. The transistor sizes and connections (pin locations) of the logic cells were kept unchanged to minimize any impact on the VLSI (physical) design flow at the full-chip level. In addition, the size and pitch of guiding templates must be consistent with the capabilities of conventional optical lithography that has larger feature sizes (Fig. 3). Overall, we re-designed a total of 85 logic cells layouts (including inverters, buffers, NAND, NOR, AOI, OAI, adders, and flip-flops) from the above cell library into DSA-aware layouts. No area penalty is observed for any of these cells and the full-chip VLSI (physical) design flow is largely unchanged. At the 22nm node, the contact hole spacing is larger than the natural pitch of the self-assembled PS-b-PMMA we use (similar to 40nm). It is more effective to use single-hole guiding templates (Fig. 1) for sparse holes and special multiple-hole templates for holes with smaller spacing. The topographical guiding templates for contact holes were patterned on silicon using e-beam lithography and etched to a depth of similar to 50nm. We use 70:30 PS-b-PMMA diblock copolymer dissolved in PGMEA (an EHS-friendly solvent for industry) for self-assembly. The DSA process is similar to the previous report [2]. The contact holes were achieved with a CD of 15nm and registration accuracy of 1nm using guiding templates with a CD of 51nm (Fig. 5 and Fig. 7). DSA also healed the defects: the DSA pattern size variation is smaller than that of the template. It is also important to note that although some small templates merged together during fabrication process, the self-assembled holes are separated spatially and can still maintain reasonable size and overlay accuracy (Fig. 7). The results show high tolerance for template defects and ensure a large process window for DSA. For tighter contact pitches, it is more effective to include more than one DSA hole within one guiding template (Fig. 1(a)). The use of a two-hole pattern (Fig. 1(b)) for patterning the polygate-to-diffusion cross-over for 22-nm SRAM has already been demonstrated [1]. The use of multiple-hole DSA with small templates will be enabled by carefully exploring the process parameter space and incorporating appropriate design changes into the cell library.