Analyzing Isochronic Forks with Potential Causality

ASYNC(2015)

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摘要
Asynchrony and concurrency are fundamental notions in the fields of asynchronous circuits as well as distributed systems. This paper treats asynchronous circuits as a special class of distributed systems. We adapt the distributed systems notion of potential causality to asynchronous circuits, and use it to provide a formal proof of the precise nature of the isochronic fork timing assumption in quasi delay-insensitive (QDI) circuits. Our proofs provide a transparent analysis that provides better intuition regarding the operation of QDI circuits. We build on our theory to rigorously establish several "folk theorems" about identifying isochronic forks in QDI circuits.
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关键词
asynchronous circuits,causality,logic design,network analysis,synchronisation,QDI circuits,asynchronous circuits,distributed systems,isochronic fork timing assumption,quasidelay-insensitive circuits,
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