4.0-4.8 Gbps Xdr Memory Channel For Graphics Intensive Consumer Applications

David Secker,Yoshie Nakabayashi,Yi Lu,Arun Vaidyanath,Gnanadeep Kollipara,Philip Yeung,Tsunwai Gary Yip

IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE 2011)（2011）

引用 0|浏览52

暂无评分

摘要

A 3.2 Gbps XDR (TM) memory channel has been optimized to achieve a bit rate of 4.8 Gbps. The 24-bit wide memory interface can deliver an aggregate data bandwidth of 14.4 GB/s to support graphics intensive consumer applications such as high refresh rate 3D digital TV. The optimized high performance channel is also designed to satisfy the low-cost constraint of consumer electronics by using wirebond packaging for the SoC and 4-layer PCB.

查看译文

关键词

graphics,printed circuits,consumer products,system on chip,production,system on a chip,digital tv,satisfiability,chip

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要