A 265 Mw, 225 MHz Signal Bandwidth, and <1-Db Gain Step Software Defined Cable Receiver Front-End Enabling Ultra-Hdtv in 28nm CMOS

A 28 nm CMOS software-defined receiver front end (SDRX) for the analog signal conditioning of high-speed data streams on cable is presented. By making efficient use of the available cable bandwidth, the presented SDRX is, to the authors' knowledge, the first reported receiver front end to enable high-speed data and Ultra-HDTV video streaming within home cable networks. This paper focuses on the SDRX system-level design methodology as the key factor in finding the most effective circuit-level solutions for power and area optimization. Its direct result is that we have implemented the most power-efficient SDRX architecture for the 28 nm CMOS process, and we have developed enhanced building blocks to optimize further the system performance. The optimal filtering strategy defines the harmonic rejection feature to reduce the external filter complexity and cost, and it also finds the appropriate ADC resolution and speed to reduce the baseband low-pass filter power and area. The SDRX gain partitioning strategy maximizes the output SNR by making sure both the mixer and baseband ADCs are fully loaded. Thus, enhanced gain blocks have been designed to accommodate a < 1 dB gain step. The presented monolithic SDRX is embedded in 28 nm CMOS multimedia SoCs, and it can cover frequency bands up to 1800 MHz and channel bandwidths up to 225 MHz. The success of the top-down design approach is validated by the 265/180 mW power consumption for 225/100 MHz signal bandwidth.