40-Mm/sup 2/ 3-V-only 50-Mhz 64-Mb 2-B/cell CHE NOR Flash Memory

This paper presents a 3-V-only 64-Mb 4-level-cell (2-b/cell) NOR-type channel-hot electron (CHE) programmed flash memory fabricated in 0.18-mum shallow-trench isolation CMOS technology. The device (die size 40 mm(2)) is organized in 64 1-Mb sectors. Hierarchical column and row decoding ensures complete isolation between different sectors during any operation, thereby increasing device reliability while still providing layout area optimization. Staircase gate-voltage programming is used to achieve narrow threshold-voltage distributions. The same program throughput as for bilevel CHE-programmed memories is obtained, thanks to parallel programming. A mixed balanced/unbalanced sensing approach allows efficient use of the available threshold window Asynchronous (130-ns access time) and burst-mode (up to 50-MHz data rate) reading is possible. Both column and row redundancy is provided to ensure extended failure coverage. Error correction code techniques, correcting 1 failed over 32 data cells, are also integrated.