4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance
2016 IEEE International Solid-State Circuits Conference (ISSCC)（2016）
摘要
This paper describes design features of the high-performance CPU from a heterogeneous tri-cluster, deca-core CPU subsystem incorporated into the Helio X20 mobile SoC for smartphone applications. The SoC is fabricated in a 20nm high-κ metal-gate CMOS, and has a die size of 100mm2. Additional key features of the SoC include: a graphics processor unit, multimedia (including 32MPixel/24fps camera support), and connectivity subsystems integrating 802.11ac, GPS, and multistandard cellular modems, featuring LTE FTD/TDD R11 Cat-6 with 20+20 carrier aggregation (300/50Mb/s) DC-HSPA+, TD-SCDMA, Edge, CDMA2000 1x/EVDO Rev. A (SRLTE).
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关键词
ultralow-power tricluster CPU subsystem,adaptive power allocation,mobile SoC performance,heterogeneous tricluster,decacore CPU subsystem,Helio X20 mobile SoC,smartphone applications,high-κ metal-gate CMOS,graphics processor unit,GPS,multistandard cellular modems,LTE FTD/TDD R11 Cat-6,carrier aggregation,DC-HSPA+,TD-SCDMA,Edge,CDMA2000 1x/EVDO Rev. A,size 20 nm,frequency 2.5 GHz,size 100 mm
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