Performance Prediction Of Hpc Applications On Intel Processors

2017 IEEE INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS (IPDPSW)(2017)

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摘要
It is commonly the case that a small number of widely used applications make up a large fraction of the workload of HPC centers. Predicting the performance of important applications running on specific processors enables HPC centers to design best performing system configurations and to insure good performance for the most popular applications on new systems. In the analyses presented in this paper we use applications that are widely used on current open science HPC systems. We characterize the performance of these applications across a spectrum of modern processors and then create a mathematical model to predict their behavior on possible future processors. The hardware sensitivity studies required to build the predictive model are carried out in an HPC cloud resource with bare metal access, and we describe the process and advantages of this approach in detail. We define and discuss the mathematical model that we have designed and compare the predicted performance of these codes with the empirical results obtained in different chips. Finally, we also use the model to estimate the efficiency of future chips. The results indicate that the model is able to estimate the performance of these codes with a relatively small error across a fairly wide spectrum of chips.
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关键词
performance, HPC, scalability, prediction, Xeon
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