A programmable energy efficient 40 Gb/s switch using frequency scaling and OpenFlow

The energy efficiency of network hardware has become a topic of considerable interest in recent years, motivated by the explosive growth of information and communication technology (ICT), and the ever increasing energy costs as well as the need to reduce Greenhouse Gas (GHG) emissions globally. One approach to saving energy in routers is to use dynamic adaptation, and this paper describes the development and performance of a testbed used to explore this approach to energy efficiency in the context of Software-Defined Networking (SDN). Such a testbed requires programmable hardware, and we implement frequency scaling on the NetFPGA 1G and 10G boards. Energy management is implemented complying with ETSI Standard 203-237 (the Green Abstraction Layer). Our implementation on NetFPGA 1G improves on existing solutions by simplifying the method of clock generation, freeing up FPGA resources to implement other functions. To the best of our knowledge, ours is the first implementation of a router featuring frequency scaling to be implemented on the NetFPGA 10G. In addition to implementing the Local Control Policy to reduce energy consumption in accordance with ETSI 203-237, we have implemented backward compatible extensions to OpenFlow v1.3.0, allowing the router to be configured via SDN. The testbed will be used to investigate new methods of reducing router energy consumption. Our preliminary results show that a frequency-scaled router with a throughput of 40Gb/s may be implemented on the NetFPGA 10G that can reduce its power consumption by up to 17% during periods of light traffic. Further reductions will be possible with future firmware enhancements and improved control policies, facilitating the design of which is the purpose of implementing the testbed.