The study of relation between variable retention time and channel implantation

Microelectronic Engineering(2016)

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摘要
In this paper, we investigate a Random Telegraph Signal (RTS) like junction leakage current causing a variable retention time (VRT) problem in Dynamic Random Access Memory (DRAM) cells. With sample devices which have different channel doping concentration, hold times of high leakage state and low leakage state are extracted in diverse storage node bias conditions, and their ratios are analyzed based on a simple equation. The hold time ratio of two states decreases with the increasing bias in high channel doping samples, while it increases in both regular channel doping samples and low channel doping samples. Display Omitted A variable retention time is investigated in channel doping split DRAM cells.The hold time ratio of two states decreases in high channel doping cell.The hold time ratio of two states increases in regular and low channel doping cells.A higher voltage can help for longer retention time in high channel doping cells.
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关键词
Retention time,DRAM,HVT,LVT,RVT,Channel doping
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