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A 16gb 1.2V 3.2gb/s/pin DDR4 SDRAM with Improved Power Distribution and Repair Strategy

2018 IEEE International Solid - State Circuits Conference - (ISSCC)(2018)

Cited 9|Views49
Key words
repair strategy,high density DRAM,power pads,improved power distribution,DDR4 SDRAM,3D stacked DRAM,redundant cell operation,built-in self-repair,bit-error correction,voltage 1.2 V,bit rate 3.2 Gbit/s,memory size 16 GByte
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