Prometheus: Processing-In-Memory Heterogeneous Architecture Design From A Multi-Layer Network Theoretic Strategy

PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)(2018)

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摘要
With increasing demand for distributed intelligent physical systems performing big data analytics on the field and in real-time, processing-in-memory (PIM) architectures integrating 3D-stacked memory and logic layers could provide higher performance and energy efficiency. Towards this end, the PIM design requires principled and rigorous optimization strategies to identify interactions and manage data movement across different vaults.In this paper, we introduce Prometheus, a novel PIM-based framework that constructs a comprehensive model of computation and communication (MoCC) based on a static and dynamic compilation of an application. Firstly, by adopting a low level virtual machine (LLVM) intermediate representation (IR), an input application is modeled as a two-layered graph consisting of (i) a computation layer in which the nodes denote computation IR instructions and edges denote data dependencies among instructions, and (ii) a communication layer in which the nodes denote memory operations (e.g., load/store) and edges represent memory dependencies detected by alias analysis. Secondly, we develop an optimization framework that partitions the multi-layer network into processing communities within which the computational workload is maximized while balancing the load among computational clusters. Thirdly, we propose a community-to-vault mapping algorithm for designing a scalable hybrid memory cube (HMC)-based system where vaults are interconnected through a network-on-chip (NoC) approach rather than a crossbar architecture. This ensures scalability to hundreds of vaults in each cube. Experimental results demonstrate that Prometheus consisting of 64 HMC-based vaults improves system performance by 9.8x and achieves 2.3x energy reduction, compared to conventional systems.
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关键词
Prometheus,processing-in-memory heterogeneous architecture design,multilayer network theoretic strategy,distributed intelligent physical systems,big data analytics,processing-in-memory architectures,logic layers,energy efficiency,PIM design,data movement,novel PIM,static compilation,dynamic compilation,low level virtual machine intermediate representation,computation layer,computation IR instructions,data dependencies,memory dependencies,optimization framework,computational workload,computational clusters,community-to-vault mapping algorithm,scalable hybrid memory cube,network-on-chip approach,crossbar architecture,communication layer,3D-stacked memory,two-layered graph
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