Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs.

ACM Great Lakes Symposium on VLSI(2018)

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摘要
Deep Convolutional Neural Networks (CNN) have become a Swiss knife in solving critical arti cial intelligence tasks. However, deploying deep CNN models for latency-critical tasks remains to be challenging because of the complex nature of CNNs. Recently, FPGA has become a favorable device to accelerate deep CNNs thanks to its high parallel processing capability and energy e ciency. In this work, we explore di erent fast convolution algorithms including Winograd and Fast Fourier Transform (FFT), and nd an optimal strategy to apply them together on di erent types of convolutions. We also propose an optimization scheme to exploit parallelism on novel CNN architectures such as Inception modules in GoogLeNet. We implement a con gurable IP-based face recognition acceler- ation system based on FaceNet using High-Level Synthesis. Our implementation on a Xilinx Ultrascale device achieves 3.75x la- tency speedup compared to a high-end NVIDIA GPU and surpasses previous FPGA results signi cantly.
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