STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units

The growing complexity of VLSI designs demands for continuous performance improvement of Electronic Design Automation (EDA) applications. Tradionally, part of this performance delta has been reached by leveraging the improvements in the single threaded performance of common processors. Unfortunately processor speeds have mostly plateaued in recent years. However, the advent of freely programmable GPUs allowed their use as highly parallel systems for a variety of computational use cases, making them an attractive device for reaching performance goals. In this paper, we introduce STP, a quadratic placement implementation, which leverages the computational power of GPUs as well as multicore CPUs in order to speed up execution.