Efficient Inter-Task Communication in Tiled Many-Core System-on-Chip Architectures.

Multicore system-on-chip architectures are dominant in all domains, such as desktop and server computers, smartphones and embedded devices. In tiled many-core systemon-chip architectures a large number of processor cores are replicated in a regular structure. Tiles contain one or multiple processor cores and other resources such as memories. The inter-tile communication is based on the network-on-chip methodology. The interface between the tiles and the network-on-chip is the network adapter. The very basic functionality of the network adapter is the packetization of data and protocol bridging. Sometimes the network adapter implements flow control above the network level or synchronization primitives. Generally, the work related to on-chip network adapters focuses on improvements on the level of the network-on-chip. Anyhow, complex software stacks become increasingly important on the computing side of network adapters. Those stacks add for example high-level message passing which abstract from the underlying hardware, and device sharing by software tasks running on top of an operating system. The network adapter shares similarities with network interface cards (NIC), especially in high performance computing (HPC). This thesis investigates the adoption of concepts from inter-node communication in HPC to on-chip communication and the co-optimization of the many-core architecture and programming model. The central contribution is the concept of a Network Adapter for Message Passing (NAMP). Motivated by the demands of aforementioned complex software stacks, the work focuses on features in the following areas: 1) Offloading higher-level protocol processing into the network adapter, 2) bypassing the operating system by virtualization, and 3) efficient event notification to the tasks. The NAMP addresses those areas with an offload of the message passing protocol handling into hardware, including the capability for collective communication between multiple tiles. It can be shared transparently by multiple task as a self-virtualized device. Furthermore, the NAMP concept includes a novel idea for efficient task notification, hardware-based operating system queue manipulation (HW-OSQM), that allows for elimination of all overhead by interrupts and can be easily generalized for arbitrary devices. Finally, the thesis contributes a concept for the migration of the communication channels during task migration as an integral part