Enhancing The Stability Of Broadband Amplifiers Using Third Order Nested Feedback

An inductorless, broadband amplifier architecture with enhanced stability and suppressed peaking is introduced. The architecture utilizes third order nested feedback technique to achieve high speed operation while maintaining robust stability compared to conventional architectures. The analysis and design considerations of the proposed architecture are presented and a prototype limiting amplifier is designed in 0.13-mu m CMOS technology. The limiting amplifier achieves a voltage gain of 52 dB with a -3 dB bandwidth of 9 GHz while dissipating 75 mW from a 1.2 V power supply. An optical receiver front-end including the proposed amplifier is also implemented in the same technology. Measurement results with PRBS 2(31)-1 input confirm the functionality of the architecture for data rates up to 7Gb/s, limited mostly by the on-chip capacitance that emulates a photodiode. The entire chip dissipates 90 mW (without the 50 Omega output buffer) from a 1.2V supply and occupies an active area of only 0.074 mm(2), including the offset cancellation network.