A Low-Cost High-Efficiency True Random Number Generator on FPGAs

True random number generator (TRNG), essential component in cryptographic equipment, which can generate unpredictable and irreproducible key string has an important effect on information encryption. In this work, a novel low-cost, high-efficiency true random number generator based on the ring oscillator is implemented on FPGAs. Forming a tapped delay line by utilizing the fast carry logic on FPGA, we have improved the efficiency of the entropy extraction from the jitter of single transition event rather than multiple jitter accumulation like most RO-based TRNGs. In order to achieve low cost and high throughput, the delay of the ring oscillator has been optimized by deeply studying LUT structure and routing resources. The proposed architecture has been validated on Xilinx Virtex-6 FPGA, which obtains a high throughput of about 100 Mbps while occupying just 25 slices and provides robustness across a wide range of temperature (0 °C ~ 80 °C), voltage (0.9 V ~ 1.1 V) and process variation (multiple chips). And the generated random bitstreams have passed all tests in the NIST statistical test suite.