100 Gbps and beyond: Hardware in the Loop experiments with PSSS modulation using 230 GHz RF frontend
2018 15th Workshop on Positioning, Navigation and Communications (WPNC)(2018)
摘要
The terahertz frequency range provides abundant bandwidth (25GHz ~ 50 GHz) to achieve ultra-high-speed wireless communication and enables data rates up to and above 100 Gbps. Parallel Sequence Spread Spectrum (PSSS) is a physical layer (PHY) baseband technology which is suitable for ultra-high speed wireless communication since the receiver architecture is straightforward and can be implemented almost entirely in analog hardware. In this paper, a PSSS modulated signal at a chip rate of 20 Gcps with a spectral efficiency of 4 bit/s/Hz is transmitted using a 230 GHz RF-front-end operating in the linear range to achieve 80 Gbps. The PSSS transceiver models are implemented in MATLAB/Simulink. The PSSS transmitter generates the PSSS modulated symbols that are loaded into an Arbitrary Waveform generator (AWG) and are then transmitted using the available 230 GHz wireless frontend. A Real-Time Oscilloscope samples and stores the received signal. The PSSS receiver performs synchronization, channel estimation, and demodulation. For a coded data rate of 80 Gbps, a BER of 2.072·10-3 has been measured. Thus, PSSS modulation is the promising modulation technique to achieve a data rate up to or above 100 Gbps in the Terahertz domain.
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关键词
100 Gbps,wireless,PSSS,PHY layer,Hardware-In-The-Loop,THz,submillimeter-wave,broadband receiver
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