Cellular automata based fault tolerant resistive memory design

This work reports a fault tolerant design for the high density resistive memories. It addresses the limitation of low cell reliability of resistive memories and the restricted write endurance. The faulty and worn-out cells of a memory module are identified on-line to recover from the damage caused during the life time of a chip. Von Neumann's theory of cellular automata has been used as a basis of the reported design. The single length cycle cellular automata (SACA) is synthesized to capture the erronous recording in a memory cell during a write and memorizes the stuck-at value stored there of. It enables effective retrieval of data during a read, that is desired for the high density resistive memories.